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Themis' new TPA-XMC is the first in a new family of
PrPMC/PrXMC modules based on P.A.
Semi's PA6T-1682M Power Architecture processor.
The TPA-XMC provides powerful dual-core 64-bit processing,
flexible high-speed I/O, and low power consumption in a small
form factor.
The P.A. Semi
PWRficient-1682M processor, based on the industry standard
64-bit implementation of the Power Architecture, redefines
power, cost, and throughput efficiency in high-performance
computing. The unique dual core, system-on-chip architecture,
underpinned by 50 patents (filed and pending), delivers high
performance at very low power consumption. The PWRficient-1682M
includes the ENVOI I/O subsystem enabling a configurable
mix of Gigabit Ethernet, 10 Gigabit Ethernet and PCI-express.
The TPA-XMC features the PWRficient-1682M on a PrPMC/PrXMC
form-factor. It delivers higher 32-bit integer and floating
point performance than existing PowerPC-based PMC modules,
while consuming 30 percent less power. The TPA-XMC also provides
the best 64-bit performance/power ratio in the industry. As
energy costs continue to climb, Themis' energy efficient TPA-XMC
is a practical upgrade for performance hungry, power constrained
applications.
Themis' TPA-XMC is designed for a wide range of networking,
wireless infrastructure, storage and military/aerospace systems
that run PowerPC® applications. Eighteen user-configurable
SERDES lanes are available on the TPA-XMC to serve a wide
range of high-speed requirements. Serdes I/O options include
Gigabit and 10 Gigabit Ethernet and PCI-Express. Since the
PWRficient-1682M achieves dramatically better performance
per watt than competing multigigahertz microprocessors, equipment
manufacturers can use the TPA-XMC as the basis for products
that run cool and efficiently, yet provide high performance.
The TPA-XMC provides support for many new or existing 32
or 64-bit PowerPC applications and Operating Support for Linux®
and VxWorks®.
P.A. Semi PA6T-1682M Dual Core 2.0GHz Processor
1 or 2GBytes of DDR2-400 ECC SDRAM Memory (soldered)
128Mbytes of OS Kernel NAND Flash Memory
Real Time Clock with 256 Bytes NVRAM
Dual Port 2MByte Shared L2 Cache
DDR2 Memory Controller
Built-In Computation and Transformation Offload Engines
for:
- Bulk Encryption
- Cyclic Redundancy Checking (CRC)
- Streaming XOR Generation
Two 10 GB and Four SGMII Protocol Engines Provide:
- Packet Processing, including Line-Rate Packet Filtering
- VLAN Flow Control
- TCP/IP Acceleration
Estimated. Maximum Power: 25W, Estimated Typical Power:
15W
64-bit 133MHz PCI-X
PCI-Express
Operating System Support
Linux,
VxWorks
Operational
Auto detects Monarch or non-Monarch mode
Configurable SERDES lanes (18) on XMC connectors
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